TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 453
TMP92xy21FG
Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY21FG.pdf
(544 pages)
Specifications of TMP92xy21FG
Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
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Modification Command
Baud Rate (bps)
f
(RAM storing address)
2000H
OSCH
(4) Description of UART boot program operation
Note 1:If f
Note 2: If f
Note 3: If f
[MHz]
internal RAM.
the PC before staring to execute the user program. The starting address to execute is
the address received first . This boot program enables user’s own on-board
programming.
a)
The boot program receives data that is sent from the PC by UART, and loads it to
If the transferring terminates normally, it calculates SUM and sends the result to
supported.
Operation procedure
1.
2.
3.
4.
5.
OSCH
OSCH
OSCH
Operation Command
Table 3.21.12 Frequency Measurement Result Data
Connect the serial cable . Make sure to perform connection before resetting
the micro controller.
Set both AM1 and AM0 pins to “1” and reset the micro controller.
program starts, it goes to a state in which it waits for the matching data to be
received. Upon receiving the matching data, it automatically adjusts the
serial channels’ initial baud rate to 9600 bps. The matching data is 5AH.
The second byte is used to echo back 5AH to the PC upon completion of the
automatic baud rate setting in the first byte. If the device fails in automatic
baud rate setting, it goes to an idle state.
The third through sixth bytes are used to send the boot program’s version
management information in ASCII code. The PC should check that the
correct version of the boot program is used.
The receive data in the first byte is the matching data. When the boot
Version Information
Table 3.21.9 Baud Rate Modification Command
Table 3.21.11 Version Management Information
is either 16.0, 20.0, 20.58 or 25.0 MHz, 115200 bps is not supported.
is 10.0 MHz, both 57600 and 115200 bps are not supported.
is 6.00, 8.00 or 9.00 MHz, then 38400, 57600 and 115200 bps are not
FRM1
C0H
Table 3.21.10 Operation Command
9600
22.579
28H
6.000
09H
02H
92CH21-451
25.000
8.000
0AH
03H
19200
18H
46H, 52H, 4DH, 31H
32.000
Start user program
9.000
08H
04H
ASCII Code
Operation
38400
07H
10.000
33.868
0BH
05H
16.000
36.000
57600
00H
06H
06H
20.000
40.000
01H
07H
115200
03H
TMP92CH21
2009-06-19
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