TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 192

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

SIRCR
(1207H)
Bit symbol
Read/Write
Reset State
Function
Select
transmit
pulse width
0: 3/16
1: 1/16
PLSEL
7
0
Receive
data
0: “H” pulse
1: “L” pulse
RXSEL
6
Figure 3.9.27 IrDA Control Register
0
Transmit
0: Disable
1: Enable
TXEN
5
92CH21-190
0
Receive
0: Disable
1: Enable
RXEN
4
0
R/W
Select receive pulse width
Formula: Effective pulse width ≥ 2x × (value + 1) + 100 ns
x = 1/f
Receive operation
Transmit operation
Select transmit pulse width
Note:
Select receive pulse width
Set effective pulse width to equal to or more than 2x ×
(value + 1) + 100 ns
Can be set: 1 to 14
Cannot be set: 0, 15
0000
0001
1110
1111
SIRWD3
to
0
1
0
1
0
1
SYS
3
0
If a pulse width complying with IrDA1.0 standard (1.6
μs min.) can be guaranteed with a low baud rate,
setting this bit to “1” will result in reduced power
dissipation.
Cannot be set
Equal to or more than 4x + 100 ns
Equal to or more than 30x + 100 ns
Cannot be set
Disable (Received input is ignored)
Enable
Disable (Input from SIO is ignored)
Enable
3/16
1/16
SIRWD2
2
0
SIRWD1
1
0
TMP92CH21
2009-06-19
SIRWD0
0
0