TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 147

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

System clock
<SYSCK>
SYSCR0
1(fs)
0(fc)
8-bit timer × 2 channels
16-bit timer mode
8-bit PPG × 1 channel
8-bit PWM × 1 channel
8-bit timer × 1 channel
−: Don’t care
Register name
<Bit Symbol>
Function
<GEAR2:0>
Clock gear
100(x16)
SYSCR1
000(x1)
001(x2)
010(x4)
011(x8)
−
(5) Settings for each mode
×8
Table 3.7.5 shows the SFR settings for each mode.
−
φT1(x2)
16384/fc
1024/fs
1024/fc
2048/fc
4096/fc
8192/fc
<TA01M1: 0>
Timer Mode
TAxxMOD<TAxCLK1:0>
00
01
10
11
11
Table 3.7.5 Timer Mode Setting Registers
φT4(x8)
16384/fc
32768/fc
65536/fc
2
4096/fs
4096/fc
8192/fc
6
(x64)
<PWM01: 00>
φT16(x32)
Table 3.7.4 PWM Cycle
131072/fc
262144/fc
PWM Cycle
16384/fs
16384/fc
32768/fc
65536/fc
(01, 10, 11)
2
6
, 2
92CH21-145
−
−
−
−
7
, 2
8
TA01MOD
φT1(x2)
16384/fc
32768/fc
2048/fs
2048/fc
4096/fc
8192/fc
TAxxMOD<TAxCLK1:0>
φT1, φT16, φT256
φT1, φT16, φT256
TAxxMOD<PWMx1:0>
(00, 01, 10, 11)
<TA1CLK1: 0>
Upper Timer
Lower timer
(01, 10, 11)
Input Clock
match,
131072/fc
2
PWM cycle
φT4(x8)
16384/fc
32768/fc
65536/fc
8192/fs
8192/fc
7
−
−
−
(x128)
φT16(x32)
131072/fc
262144/fc
524288/fc
32768/fs
32768/fc
65536/fc
External clock,
External clock,
External clock,
External clock,
<TA0CLK1: 0>
φT1, φT4, φT16
φT1, φT4, φT16
φT1, φT4, φT16
φT1, φT4, φT16
(00, 01, 10, 11)
(00, 01, 10, 11)
(00, 01, 10, 11)
(00, 01, 10, 11)
Lower Timer
Input Clock
−
φT1(x2)
16384/fc
32768/fc
65536/fc
4096/fs
4096/fc
8192/fc
TAxxMOD<TAxCLK1:0>
0: Lower timer output
1: Upper timer output
Invert Signal Select
Output disabled
131072/fc
262144/fc
2
φT4(x8)
16384/fs
16384/fc
32768/fc
65536/fc
8
<TA1FFIS>
(x256)
TA1FFCR
Timer F/F
TMP92CH21
2009-06-19
−
−
−
φT16(x32)
1048576/fc
131072/fc
262144/fc
524288/fc
65536/fs
65536/fc