TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 360

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

3.14.3.10 Program Example (4 K colors STN)
; ********PORT settings *********
; ********LCD settings*********
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
ld
(PLFC), 0ffh
(PLCR), 0f0h
(PKFC), 0fh
(LCDSCC), 51
(LCDCCR0), 01h
(LCDCCR1), 01h
(LCDCCR2), 02h
(LCDSIZE), 64h
(LCDFFP), 240
(LCDMODE0), 096h
(LCDMODE1), 02h
(LSARCL), 00h
(LSARCM), 00h
(LSARCH), 40h
(LSARAL), 00h
(LSARAM), 00h
(LSARAH), 00h
(LSARBL), 00h
(LSARBM), 00h
(LSARBH), 00h
(CMNAL), 00h
(CMNAH), 00h
(CMNBL), 00h
(CMNBH), 00h
(LCDCTL1), 0e0h
(LCDDVM), 3
(LCDCTL0), 01h
; LD7 to LD0 set
; Output mode
; LBCD, LLP, LCP0
; Counter set (Refresh rate: 100 Hz at fc = 40 MHz)
;
; SCP Negative edge
;
; 240 com × 256 seg
; 240 com
; SDRAM, STN: 4 K
; 8-bit width A type
; C area (enable)
;
;
; A area (disable)
;
;
; B area (disable)
;
;
; A area Row number
; B area Row number
;
; SCP0, SCP1: Negative edge, BCD:
; START (FP bit8 = 0)
92CH21-358
TMP92CH21
2009-06-19