TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 21

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Note: When using USB, the high-frequency oscillator should be 9.0 MHz.
3.3.1
XT1
XT2
X1
X2
(a) USB in use, with PLL
(b) USB not in use, with PLL
(c) USB not in use, without PLL
SYSCR0<XTEN >
SYSCR0<XEN >
f
USB
High-frequency
Low-frequency
Block Diagram of System Clock
oscillator
oscillator
(48 MHz) = f
fs
f
SYS
φT0
f
IO
OSCH
f
OSCH
fs
Clock doubler
× 16/3
Figure 3.3.2 Block Diagram of System Clock
(PLL)
Table 3.3.1 Selection Example for f
f
(High/low-frequency oscillator)
PLL
SYSCR0<WUEF>
SYSCR2<WUPTM1:0>
TMRA0 to 3,TMRB0
RTC
ADC
SIO0 to SIO1
MLD/ALM
WDT
Lock up timer
= f
PLLCR1<PLLON>,
PLLCR0<LUPFG>
Prescaler
Prescaler
OSCH
Warm-up timer
(PLL)
USBCR1<USBCLKE>
Selector
PLLCR0<FCSEL>
Oscillation: f
× 4
10.0 MHz (max)
40.0 MHz (max)
High-frequency
9.0 MHz
92CH21-19
fc
÷2
fc/2
Clock-gear
÷4
fc/4
OSCH
÷8
fc/8
÷16
fc/16
System Clock:
18 MHz
20 MHz (max)
20 MHz (max)
SYSCR1<GEAR2:0>
OSCH
f
SYS
RAM, ROM
SDRAMC
SYSCR1<SYSCK>
Controller
controller
I/O ports
Interrupt
CPU
USB
I
2
S
f
FPH
USB Clock: f
NAND flash
÷2
controller
controller
Memory
LCDC
TSI
48 MHz
÷4 ÷8
−
−
÷2
TMP92CH21
USB
2009-06-19
f
φT
φT0
fs
f
IO
SYS