TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 454
TMP92xy21FG
Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY21FG.pdf
(544 pages)
Specifications of TMP92xy21FG
Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
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6.
7.
8.
9.
10. The n’th − 3 bytes and the n’th − 2 bytes are the SUM value that is sent to the
11. After sending the SUM, the device goes to a state waiting for the user
12. The n’th byte is used to echo back the user program start code to the PC.
13. If the user program start code is wrong or a receive error occurs, the device
The seventh byte is used to send information of the measured frequency.
The PC should check that the frequency of the resonator is measured
correctly.
The receive data in the eighth byte is the baud rate modification data. The
five kinds of baud rate modification data shown in Table 3.21.9 are available.
Even when you do not change the baud rate, be sure to send the initial baud
rate data (28H: 9600 bps). Baud rate modification becomes effective after the
echo back transmission is completed.
The ninth byte is used to echo back the received data to the PC when the data
received in the eighth byte is one of the baud rate modification data
corresponding to the device’s operating frequency. Then the baud rate is
changed. If the received baud rate data does not correspond to the device’s
operating frequency, the device goes to an idle state after sending 3 bytes of
baud rate modification error code (62H).
The receive data in the 10th byte through n’th − 4 bytes is received as binary
data in Intel Hex format. No received data is echoed back to the PC.
The boot program processing routine ignores the received data until it
receives the start mark (3AH for “ : ”) in Intel Hex format. Nor does it send
error code to the PC. After receiving the start mark, the routine receives a
range of data from the data length to checksum and writes the received data
to the specified RAM addresses successively.
After receiving one record of data from start mark to checksum, the routine
goes to a start mark waiting state again.
If a receive error or checksum error of Intel Hex format occurs, the device
goes to an IDLE state without returning error code to the PC.
Because the boot program processing routine executes a SUM calculation
routine upon detecting the end record, the controller should be placed in a
SUM waiting state after sending the end record to the device.
PC in order of upper byte and lower byte. For details on how to calculate the
SUM, refer to “notes on SUM” in the latter pages of this manual. The SUM
calculation is performed only when no write error, receive error, or Intel Hex
format error has been encountered after detecting the end record. Soon after
calculation of SUM, the device sends the SUM data to the PC. The PC should
determine whether writing to the RAM has terminated normally depending
on whether the SUM value is received after sending the end record to the
device.
program start code. If the SUM value is correct, the PC should send the user
program start command to the n’th − 1 byte. The user program start
command is C0H.
After sending the echo back to the PC, the stack pointer is set to 5FFFH and
the boot program jumps to the 1st address that is received as data in Intel
Hex format.
goes to an idle state after returning 3 bytes of error code to the PC.
92CH21-452
TMP92CH21
2009-06-19
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