TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 136

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
TA1FFCR
(1105H)
Read-modify-
write
instruction
is prohibited.
Bit symbol
Read/Write
Reset State
Function
Note: The values of bits4 to 6 of TA1FFCR are undefined when read.
7
Figure 3.7.7 TMRA Flip-Flop Control Register
TMRA1 Flip-Flop Control Register
6
92CH21-134
5
4
00: Invert TA1FF
01: Set TA1FF
10: Clear TA1FF
11: Don’t care
TA1FFC1
3
1
Inverse signal for timer flop-flop 1 (TA1FF)
(Don’t care except in 8-bit timer mode)
Inversion of TA1FF
Control of TA1FF
00
01
10
11
0
1
0
1
Inversion by TMRA0
Inversion by TMRA1
Disabled
Enabled
Inverts the value of TA1FF
Sets TA1FF to “1”
Clears TA1FF to “0”
Don’t care
TA1FFC0
2
1
R/W
TA1FF
control for
inversion
0: Disable
1: Enable
TA1FFIE
1
0
TMP92CH21
2009-06-19
TA1FF
inversion
select
0: TMRA0
1: TMRA1
TA1FFIS
0
0

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