TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 28

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TMP92xy21FG

Manufacturer Part Number
TMP92xy21FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy21FG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
16
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
82
Power Supply Voltage(v)
3.0 to 3.6
Example 3: Changing to a high-frequency gear
Example:
SYSCR1
SYSCR1
(2) Clock gear controller
(High-speed clock gear changing)
SYSCR1<GEAR2:0> to either fc, fc/2, fc/4, fc/8 or fc/16. Using the clock gear to select a
lower value of f
register.It is necessary for the warm-up time to elapse before the change occurs after
writing the register value.
instruction is executed by the clock gear before changing.To execute the instruction
following the clock gear switching instruction by the clock gear after changing, input
the dummy instruction as follows (instruction to execute the write cycle).
X: Don’t care
f
To change the clock gear, write the register value to the SYSCR1<GEAR2:0>
There is the possibility that the instruction following the clock gear changing
FPH
EQU
LD
LD
EQU
LD
LD
Instruction to be executed after clock gear has changed
is set according to the contents of the clock gear select register
10E1H
(SYSCR1), XXXX0000B
(DUMMY), 00H
10E1H
(SYSCR1), XXXX0001B
(DUMMY), 00H
FPH
reduces power consumption.
92CH21-26
;
;
;
;
Changes f
Dummy instruction
Changes f
Dummy instruction
SYS
SYS
to fc/2.
to fc/4.
TMP92CH21
2009-06-19

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