TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 40

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

<SYSCK>
SYSCR1
Interrupt for
D0 to D31
A0 to A23
0 (fc)
1 (fs)
release
Figure 3.3.9 Timing Chart for STOP Mode Halt State Cleared by Interrupt
3.
WR
Table 3.3.6 Example of Warm-up Time after Releasing STOP Mode
RD
X1
STOP mode
oscillator.
warm-up time has elapsed, in order to allow oscillation to stabilize.
an interrupt.
When STOP mode is selected, all internal circuits stop, including the internal
After STOP mode has been cleared system clock output starts when the
Figure 3.3.9 illustrates the timing for clearance of the STOP mode halt state by
01 (2
6.4 μ s
7.8 ms
8
)
Data
92CH21-38
SYSCR2<WUPTM1:0>
STOP
mode
10 (2
409.6 μ s
Warm-up time
500 ms
14
)
at f
OSCH
= 40 MHz, fs = 32.768 kHz
2000 ms
1.638 ms
11 (2
16
)
TMP92CH21
2009-06-19
Data