TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 56

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

INTEALM4
INTEND01
INTERTC
Symbol
INTEKEY
INTELCD
INTEP0
INTALM4
INTNDF0
INTNDF1
INTRTC
INTKEY
INTLCD
Interrupt request flag
Name Address
enable
enable
enable
enable
enable
enable
INTP0
&
ECH
E7H
E8H
E9H
EAH
EEH
IN1C
0
R
7
−
−
−
−
−
Note: Always write 0
Note: Always write 0
Note: Always write 0
Note: Always write 0
Note: Always write 0
IN1M2
0
6
−
−
−
−
−
lxxM2
INTNDF1
0
0
0
0
1
1
1
1
92CH21-54
−
−
−
−
−
IN1M1
R/W
0
5
−
−
−
−
−
lxxM1
0
0
1
1
0
0
1
1
IN1M0
0
4
−
−
−
−
−
lxxM0
1
0
1
0
1
0
0
1
ILCD1C
IA4C
IN0C
IP0C
IRC
IKC
0
0
0
0
0
0
3
R
R
R
R
R
R
Disables interrupt requests
Sets interrupt priority level to 1
Sets interrupt priority level to 2
Sets interrupt priority level to 3
Sets interrupt priority level to 4
Sets interrupt priority level to 5
Sets interrupt priority level to 6
Disables interrupt requests
ILCDM2
IN0M2
IA4M2
IP0M2
IRM2
IKM2
0
0
0
0
0
0
2
Function (Write)
INTALM4
INTNDF0
INTRTC
INTKEY
INTLCD
INTP0
ILCDM1
IN0M1
IA4M1
IP0M1
R/W
IRM1
R/W
IKM1
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
TMP92CH21
2009-06-19
ILCDM0
IA4M0
IN0M0
IP0M0
IRM0
IKM0
0
0
0
0
0
0
0