TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 248

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

(2) Transfer mode
•
(a) Bulk transfer type
UDC supports FULL speed transfer mode.
The following is an explanation of UDC operation in each transfer mode.
The explanation is of data flow up until FIFO.
FULL speed device
using detect error and retry. Basically, 3 phases are used - token, data and
handshake. However, with flow control and a STALL condition, data phase is
changed to hand shake phase, and it become to 2 phases. The UDC holds status of
each endpoint, and flow control is controlled in hardware. Each endpoint condition
can be confirmed using EPx_STATUS register.
Control transfer type
Interrupt transfer type
Bulk transfer type
Isochronous transfer type
Bulk transfer type warrants transferring no error between host and function by
92CH21-246
TMP92CH21
2009-06-19