TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 422

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

Read-modify
-write
instruction is
prohibited.
TB0FFCR
(1183H)
Bit symbol
Read/Write
Reset State
Function
Always write “11”.
7
−
1
W*
Figure 3.18.4 The Registers for TMRB
6
−
1
TMRB0 Flip-Flop Control Register
TB0FF0 inversion trigger
0: Disable trigger
1: Enable trigger
Invert when
the UC value
is loaded into
TB0CP1H/L.
TB0C1T1
92CH21-420
5
0
Invert when
the UC value
is loaded into
TB0CP0H/L.
TB0C0T1
Timer flip-flop control (TB0FF0)
Inverted when the UC10 value matches the value in
TB0RG0H/L.
Inverted when the UC10 value matches the value in
TB0RG1H/L.
Inverted when the UC10 value is loaded into TB0CP0H/L.
Inverted when the UC10 value is loaded into TB0CP1H/L.
4
0
00
01
10
11
0
1
0
1
0
1
0
1
R/W
Invert
Set to 1
Clear to 0
Don’t care
Disable trigger
Enable trigger
Disable trigger
Enable trigger
Disable trigger
Enable trigger
Disable trigger
Enable trigger
Invert when
the UC value
matches the
value in
TB0RG1H/L.
TB0E1T1
3
0
Invert when
the UC value
matches the
value in
TB0RG0H/L.
TB0E0T1
2
0
Control TB0FF0
00: Invert
01: Set
10: Clear
11: Don’t care
* Always read as 11.
TB0FF0C1
1
1
TMP92CH21
W*
2009-06-19
TB0FF0C0
0
1