TMP92xy21FG Toshiba, TMP92xy21FG Datasheet - Page 322

• Manufacturer Part Number: TMP92xy21FG
• Manufacturer: Toshiba

Specifications of TMP92xy21FG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 16
• Architecture: 32-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: 1
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 82
• Power Supply Voltage(v): 3.0 to 3.6

SECR
(1320H)
3.13.4
Bit symbol
Read/Write
Reset State
Function
Detailed Explanation of Control Register
(1) Second column register (for PAGE0 only)
RTC is not initialized by system reset.
Therefore, all registers must be initialized at the beginning of the program.
"0" is read.
7
40 sec.
column
SE6
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
Note: Do not set data other than as shown above.
20 sec.
column
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
SE5
92CH21-320
5
0
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
10 sec.
column
SE4
4
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
1
0
1
Undefined
column
:
:
:
:
:
8 sec.
R/W
SE3
3
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
column
4 sec.
SE2
2
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
column
2 sec.
SE1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TMP92CH21
2009-06-19
column
10 sec
19 sec
20 sec
29 sec
30 sec
39 sec
40 sec
49 sec
50 sec
59 sec
1 sec.
0 sec
1 sec
2 sec
3 sec
4 sec
5 sec
6 sec
7 sec
8 sec
9 sec
SE0
0