UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 1131

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
UF0E0ST register
UF0E0ST register
UF0IS1 register
UF0IS1
UF0IS1 register
UF0IS1
CPUDEC bit of
CPUDEC bit of
PROT
PROT
Status of
Status of
register
register
bit of
bit of
normal reception of
normal reception of
Completion of
SETUP token
Completion of
SETUP token
(b) When SETUP transaction is received more than once
decoding request
Completion of
of decoding
Completion
request
Figure 21-5. Operation of UF0E0ST Register
FW processing
(FW clear)
INT clear
INT clear
(FW clear)
(a) Normal
SETUP token
Completion
CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
of reading
of second
reception
Start of
FIFO
on completion of
Hardware clear
reading 8 bytes
Hardware clear
SETUP token
Completion
reception
of second
of normal
decoding request
Completion of
normal reception of
Completion of
SETUP token
Hardware processing
of decoding
Completion
request
INT clear
(FW clear)
Completion of
reading FIFO
of reading
FIFO
Start
Page 1131 of 1509
Hardware
clear
INT clear
(FW clear)

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