UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 897

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) Remote frame
(3) Description of fields
A remote frame is composed of six fields.
<1> Start of frame (SOF)
Remarks 1. The data field is not transferred even if the control field’s data length code is not “0000B”.
The start of frame field is located at the start of a data frame or remote frame.
• If a dominant level is detected in the bus idle state, a hardware synchronization is performed (the current
• If a dominant level is sampled at the sample point following such a hardware synchronization, the bit is
Remark D: Dominant = 0
TQ is assigned to be the SYNC segment).
assigned to be a SOF. If a recessive level is detected, the protocol layer returns to the bus idle state and
regards the preceding dominant pulse as a noise only. In this case an error frame is not generated.
R
D
2. D: Dominant = 0
<1>
(Interframe space or bus idle)
R: Recessive = 1
R: Recessive = 1
<2>
<3>
Remote frame
Figure 20-5. Start of Frame (SOF)
R
D
Figure 20-4. Remote Frame
<5>
Start of frame
<6> <7>
1 bit
<8>
CHAPTER 20 CAN CONTROLLER
Interframe space
End of frame (EOF)
ACK field
CRC field
Control field
Arbitration field
Start of frame (SOF)
(Arbitration field)
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