UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 757

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Remark f
To set the baud rate, perform the following calculation for setting the UCnCTL1 and UCnCTL2 registers (when
using internal clock).
<1> Set k to fxx/2/(2 × target baud rate) and m to 0.
<2> If k is 256 or greater (k ≥ 256), reduce k to half (k/2) and increment m by 1 (m + 1).
<3> Repeat Step <2> until k becomes less than 256 (k < 256).
<4> Round off the first decimal point of k to the nearest whole number.
<5> Set the value of m to UCnCTL1 register and the value of k to the UCnCTL2 register.
Example: When f
The representative examples of baud rate settings are shown below.
Baud Rate
1,000,000
1,250,000
2,000,000
2,500,000
3,000,000
(bps)
153,600
312,500
625,000
19,200
31,250
38,400
76,800
If k becomes 256 after round-off, perform Step <2> again to set k to 128.
1,200
2,400
4,800
9,600
ERR: Baud rate error (%)
XX
300
600
:
<1> k = 480,000,000/2/(2 × 153,600) = 78.125…, m = 0
<2>, <3> k = 78.125… < 256, m = 0
<4> Set value of UCnCTL2 register: k = 78 = 4EH, set value of UCnCTL1 register: m = 0
Actual baud rate = 48,000,000/2/(2 × 78)
Baud rate error = {48,000,000/2/(2 × 78 × 153,600) − 1} × 100
Main clock frequency
UCnCTL1 UCnCTL2
08H
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
00H
00H
00H
00H
XX
= 48 MHz and target baud rate = 153,600 bps
f
XX
= 48 MHz
9CH
9CH
9CH
9CH
9CH
9CH
9CH
C0H
9CH
9CH
0CH
= 153,846 [bps]
= 0.160 [%]
4EH
0AH
26H
13H
06H
05H
04H
Table 17-4. Baud Rate Generator Setting Data
CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE C (UARTC)
ERR (%)
−4.00 Setting prohibited
−4.00
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
1.05
1.05
0.00
0.00
0.00
UCnCTL1 UCnCTL2
Setting prohibited
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
00H
00H
f
XX
= 32 MHz
D0H
D0H
D0H
D0H
D0H
D0H
D0H
D0H
0DH
1AH
80H
68H
34H
08H
04H
ERR (%)
−1.54
−1.54
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
0.00
0.00
UCnCTL1 UCnCTL2
Setting prohibited
07H
06H
05H
04H
03H
02H
01H
00H
00H
00H
00H
00H
00H
00H
00H
f
XX
= 24 MHz
9CH
9CH
9CH
9CH
9CH
9CH
9CH
C0H
9CH
4EH
0AH
27H
13H
06H
05H
Page 757 of 1509
ERR (%)
−4.00
−4.00
−2.3
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
1.05
0.00