UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 813

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
18.9 Cautions
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) When transferring transmit data and receive data using DMA transfer, error processing cannot be performed even if
(2) If a register that is prohibited to be rewritten during operation (CFnCTL0.CFnPWR bit = 1) is rewritten by mistake
(3) In communication type 2 or 4 (CFnCTL1.CFnDAP bit = 1), the CFnSTR.CFnTSF bit is cleared half a SCKFn clock
Remark
an overrun error occurs during serial transfer. Check that the no overrun error has occurred by reading the
CFnSTR.CFnOVE bit after DMA transfer has been completed.
during operation, set the CFnCTL0.CFnPWR bit to 0 once, then initialize CSIFn.
Registers to which rewriting during operation is prohibited are shown below.
• CFnCTL0 register: CFnTXE, CFnRXE, CFnDIR, CFnTMS bits
• CFnCTL1 register: CFnCKP, CFnDAP, CFnCKS2 to CFnCKS0 bits
• CFnCTL2 register: CFnCL3 to CFnCL0 bits
after the occurrence of a reception completion interrupt (INTCFnR).
In the single transfer mode, writing the next transmit data is ignored during communication (CFnTSF bit = 1), and
the next communication is not started.
CFnCTL0.CFnRXE bit = 1) is set, the next communication is not started even if the receive data is read during
communication (CFnTSF bit = 1).
Therefore, when using the single transfer mode with communication type 2 or 4 (CFnDAP bit = 1), pay particular
attention to the following.
• To start the next transmission, confirm that CFnTSF bit = 0 and then write the transmit data to the CFnTX
• To perform the next reception continuously when reception-only communication (CFnTXE bit = 0, CFnRXE bit =
Or, use the continuous transfer mode instead of the single transfer mode. Use of the continuous transfer mode is
recommended especially when using DMA.
register.
1) is set, confirm that CFnTSF bit = 0 and then read the CFnRX register.
n = 0 to 4
CHAPTER 18 3-WIRE VARIABLE-LENGTH SERIAL I/O (CSIF)
Also if reception-only communication (CFnCTL0.CFnTXE bit = 0,
Page 813 of 1509