UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 653

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Alarm Setting Time
Sunday, 7:00 a.m.
Sunday/Monday, 00:15 p.m.
Monday/Tuesday/Friday, 5:30 p.m.
Everyday, 10:45 p.m.
Alarm Setting Time
Sunday, 7:00
Sunday/Monday, 12:15
Monday/Tuesday/Friday, 17:30
Everyday, 22:45
(17) Prescaler mode register 0 (PRSM0)
Cautions 1.
(a) Alarm interrupt setting examples (RC1ALM, RC1ALH, and RC1ALW setting examples)
The PRSM0 register (8-bit) controls the generation of the real time counter count clock (f
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Tables 12-4 and 12-5 show setting examples if Sunday is RC1WEEK = 00, Monday is RC1WEEK = 01,
Tuesday is RC1WEEK = 02, ···, and Saturday is RC1WEEK = 06.
Table 12-4. Alarm Setting Example if AMPM = 0 (RC1HOUR Register 12-Hour Display)
Table 12-5. Alarm Setting Example if AMPM = 1 (RC1HOUR Register 24-Hour Display)
2.
3.
PRSM0
After reset : 00H
Do not change the values of the BGCS00 and BGCS01 bits during real time
counteroperation.
Set the PRSM0 register before setting the BGCE0 bit to 1.
Set the PRSM0 and PRSCM0 registers according to the main clock frequency that is used
so as to obtain an f
BGCS01
BGCE0
0
1
0
0
1
1
0
BGCS00
Disabled
Enabled
R/W
0
1
0
1
Register
Register
0
BRG
frequency of 32.768 kHz.
f
f
f
f
X
X
X
X
Address : FFFFF8B0H
/2
/4
/8
0
Selection of real time counter source clock(f
RC1ALW
RC1ALW
BGCE0
Main clock operation enable
01H
03H
26H
7FH
01H
03H
26H
7FH
< >
5 MHz
200 ns
400 ns
800 ns
1.6 μs
0
CHAPTER 12 REAL-TIME COUNTER
0
RC1ALH
RC1ALH
07H
25H
30H
07H
17H
22H
32H
12H
BGCS01 BGCS00
4 MHz
250 ns
500 ns
1 μs
2 μs
BGCS
)
BRG
).
RC1ALM
RC1ALM
00H
30H
45H
15H
00H
15H
30H
45H
Page 653 of 1509

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