UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 326

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
<1> Count operation start flow
<2> Capture 0 read flow
[Lower timer: TAA1]
[Higher timer: TAA0]
Executing instruction that clears
TAA1CTL0 register
(TAA1CKS0 to TAA1CKS2 bits),
TAA1CTL1
TAA1IOC1
TAA1IOC2
TAA1OPT0
TAA0CTL1
TAA0IOC1
TAA0OPT0
TAA0OPT1
(Captured value − Previously
TAA0CCIC0.TAA0CCIF0 bit
INTTAA0CCR0
(reading capture register 0)
Reading TAA1CCR0 and
Calculating pulse interval
Register initial setting
TAA0CCR0 registers
TAA1CE
(CLR TAA0CCIF0)
TAA1CCIF0 = 0?
captured value)
register,
START
register,
register,
register,
register,
register,
register
register
Figure 7-51. Operation Flow in Cascade Connection of TAA1 and TAA0 (2/2)
bit = 1
YES
YES
generated?
NO
NO
TAA1CKS0 to TAA1CKS2 bits
can be set as soon as counting
operation starts
(TAA1CE bit = 1).
Perform initial setting
of these registers
before TAA1CE bit = 1.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
<5> Count operation stop flow
<4> Overflow flag clear flow
<2> Capture 1 read flow
Executing instruction that clears
Executing instruction that clears
TAA0OVF bit (CLR TAA0OVF)
(Captured value − Previously
Reading TAA0OPT0 register
TAA0CCIC1.TAA0CCIF1 bit
INTTAA0CCR1
(reading capture register 0)
Reading TAA1CCR1 and
Calculating pulse interval
(checking overflow flag)
TAA0CCR1 registers
(CLR TAA0CCIF1)
TAA0CCIF1 = 0?
TAA0OVF
TAA1CE
captured value)
STOP
YES
YES
YES
bit = 0
generated?
bit = 1
NO
NO
NO
Counter is initialized by
stopping counting operation
(TAA1CE bit = 0).
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