UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 252

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(e) TAAn counter read buffer register (TAAnCNT)
(f) TAAn capture/compare register 0 (TAAnCCR0)
(g) TAAn capture/compare register 1 (TAAnCCR1)
The count value of the 16-bit counter can be read by reading the TAAnCNT register.
If D
request signal (INTTAAnCC0) is generated when the number of external event counts reaches
(D
Usually, the TAAnCCR1 register is not used in the external event count mode. However, the set
value of the TAAnCCR1 register is transferred to the CCR1 buffer register. When the count value
of the 16-bit counter matches the value of the CCR1 buffer register, a compare match interrupt
request signal (INTTAAnCC1) is generated.
Therefore, mask the interrupt signal by using the interrupt mask flag (TAAnCCMK1).
Caution
Remarks 1. TAAn I/O control register 1 (TAAnIOC1) and TAAn option register 0 (TAAnOPT0) are
0
+ 1).
0
Figure 7-16. Register Setting for Operation in External Event Count Mode (2/2)
is set to the TAAnCCR0 register, the counter is cleared and a compare match interrupt
2. n = 0 to 3, 5
When an external clock is used as the count clock, the external clock can be input only from
the TIAAn0 pin. At this time, set the TAAnIOC1.TAAnIS1 and TAAnIOC1.TAAnIS0 bits to 00
(capture trigger input (TIAAn0 pin): no edge detection).
not used in the external event count mode.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
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