UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 190

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
5.5.2
inserted in the bus cycle by using the external wait pin (WAIT).
external wait function, in the same manner as the programmable wait function.
TW states of the bus cycle. it is sampled at the rising edge of the clock immediately after the T1 and TW states of the bus
cycle. If the setup/hold time of the sampling timing is not satisfied, a wait state is inserted in the next state, or not inserted
at all.
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
To synchronize an extremely slow external memory, I/O, or asynchronous system, any number of wait states can be
When the P60
Access to each area of the internal ROM, internal RAM, and on-chip peripheral I/O is not subject to control by the
The WAIT signal can be input asynchronously to CLKOUT, and is sampled at the falling edge of the clock in the T2 and
Notes 1. V850ES/JG3-H
External wait function
2. V850ES/JH3-H
Note 1
or PCM0
Note 2
pin is set to its alternate function, the external wait function is enabled.
CHAPTER 5 BUS CONTROL FUNCTION
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