UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 907

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
20.3.5 CAN sleep mode/CAN stop mode function
consumption.
by bus operation (the CAN stop mode is controlled by CPU access).
20.3.6 Error control function
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
The CAN sleep mode/CAN stop mode function puts the CAN controller in waiting mode to achieve low power
The controller is woken up from the CAN sleep mode by bus operation but it is not woken up from the CAN stop mode
(1) Error types
(2) Output timing of error frame
(3) Processing in case of error
Bit error
Stuff error
CRC error
Form error
ACK error
Type
The transmission node re-transmits the data frame or remote frame after the error frame. (However, it does not re-
transmit the frame in the single-shot mode.)
Bit error, stuff error, form
error, ACK error
CRC error
Comparison of the output level
and level on the bus
Check of the receive data at
the stuff bit
Comparison of the CRC
sequence generated from the
receive data and the received
CRC sequence
Field/frame check of the fixed
format
Check of the ACK slot by the
transmitting node
Type
Detection Method
Description of Error
Error frame output is started at the timing of the bit following the detected error.
Error frame output is started at the timing of the bit following the ACK delimiter.
Table 20-12. Output Timing of Error Frame
Mismatch of levels
6 consecutive bits of
the same output level
Mismatch of CRC
Detection of fixed
format violation
Detection of recessive
level in ACK slot
Table 20-11. Error Types
Detection
Condition
Output Timing
Transmitting/
receiving node
Receiving node
Receiving node
Receiving node
Transmitting node
Transmission/
Reception
CHAPTER 20 CAN CONTROLLER
Start of frame to CRC sequence
Bit that is outputting data on the bus
at the start of frame to end of frame,
error frame and overload frame.
CRC field
CRC delimiter
ACK field
End of frame
Error frame
Overload frame
ACK slot
Detection State
Field/Frame
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