UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 218

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) TAAn control register 0 (TAAnCTL0)
The TAAnCTL0 register is an 8-bit register that controls the operation of TAAn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TAAnCTL0 register by software.
TAAnCTL0
(n = 0 to 5)
After reset: 00H
Note TAAnOPT0.TAAnOVF bit, 16-bit counter, timer output (TOAAn0, TOAAn1 pins)
Cautions 1. Set the TAAnCKS2 to TAAnCKS0 bits when the TAAnCE bit = 0.
Remark
TAAnCKS2
TAAnCE
TAAnCE
0
1
7
0
0
0
0
1
1
1
1
2. Be sure to set bits 3 to 6 to “0”.
TAAnCKS1
TAAn operation disabled (TAAn reset asynchronously
TAAn operation enabled. TAAn operation started.
f
The values in parentheses indicate the cycles when f
XX
R/W
: Main clock frequency
6
0
When the value of the TAAnCE bit is changed from 0 to 1, the
TAAnCKS2 to TAAnCKS0 bits can be set simultaneously.
0
0
1
1
0
0
1
1
Address:
TAAnCKS0
5
0
0
1
0
1
0
1
0
1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AA (TAA)
TAA0CTL0 FFFFF630H, TAA1CTL0 FFFFF640H,
TAA2CTL0 FFFFF650H, TAA3CTL0 FFFFF660H,
TAA4CTL0 FFFFF670H, TAA5CTL0 FFFFF680H
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
/2
/4
/8
/16
/32
/64
/128
4
0
TAAn operation control
n = 0, 1, 4
(20.8 ns)
(41.7 ns)
(83.3 ns)
(166.7 ns)
(333.3 ns)
(666.7 ns)
(1.3333 s)
(2.6667 s)
Internal count clock selection
3
0
μ
μ
TAAnCKS2 TAAnCKS1 TAAnCKS0
2
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
/2
/4
/8
/16
/64
/256
/512
/1024
Note
n = 2, 3, 5
).
1
XX
(41.7 ns)
(83.3 ns)
(166.7 ns)
(333.3 ns)
(1.3333 s)
(5.3333 s)
(10.6667 s)
(21.3333 s)
= 48 MHz.
μ
μ
μ
μ
0
Page 218 of 1509