UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 427

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UPD70F3771GF-GAT-AX

Manufacturer Part Number
UPD70F3771GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet

Specifications of UPD70F3771GF-GAT-AX

Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CAN, CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3771GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) Operation flow in pulse width measurement mode
<1> Count operation start flow
<2> Count operation stop flow
Figure 8-37. Software Processing Flow in Pulse Width Measurement Mode
INTTABnCC0 signal
(TABnCKS0 to TABnCKS2 bits),
TABnCCR0 register
TIABn0 pin input
Set TABnCTL0 register
Register initial setting
TABnCTL1 register,
TABnIOC1 register,
TABnIOC2 register,
16-bit counter
TABnOPT0 register
TABnCTL0 register
(TABnCE bit = 1)
TABnCE bit = 0
TABnCE bit
START
FFFFH
STOP
0000H
<1>
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
The initial setting of these registers
is performed before setting the
TABnCE bit to 1.
The TABnCKS0 to TABnCKS2 bits can
be set at the same time when counting
has been started (TABnCE bit = 1).
The counter is initialized and counting
is stopped by clearing the TABnCE bit to 0.
D
0
D
1
D
<2>
2
0000H
Page 427 of 1509

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