UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 179

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
5.2.1
5.2.2
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
When the internal ROM, internal RAM, or on-chip peripheral I/O are accessed, the status of each pin is as follows.
Caution When a write access is performed to the internal ROM area, address, data, and control signals are
For the pin status of the V850ES/JG3-H and V850ES/JH3-H in each operation mode, see 2.2 Pin States.
Address/data bus
(AD15 to AD0)
Address bus
(A23 to A16)
Address bus
(A15 to A0)
Control signal
Bus Control Pin
Pin status when internal ROM, internal RAM, or on-chip peripheral I/O is accessed
Pin status in each operation mode
Table 5-4. Pin Statuses When Internal ROM, Internal RAM, or On-Chip Peripheral I/O Is Accessed
activated in the same way as access to the external memory area.
Undefined
Undefined
Undefined
Inactive
Internal ROM/RAM
Separate Bus Mode
Undefined
Undefined (Address
output during access)
Undefined (Address
output during access)
Inactive
Peripheral I/O
Undefined
Undefined
Undefined
Inactive
Internal ROM/RAM
CHAPTER 5 BUS CONTROL FUNCTION
Multiplexed Bus Mode
Undefined
Undefined (Address
output during access)
Undefined (Address
output during access)
Inactive
Peripheral I/O
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