UPD70F3771GF-GAT-AX Renesas Electronics America, UPD70F3771GF-GAT-AX Datasheet - Page 591

• Manufacturer Part Number: UPD70F3771GF-GAT-AX
• Description: MCU 32BIT V850ES/JX3-H 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Hr

Specifications of UPD70F3771GF-GAT-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: CAN, CSI, EBI/EMI, I²C, UART/USART, USB
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JG3-H, V850ES/JH3-H
11.4 Operation
11.4.1 System outline
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(1) Outline of 6-phase PWM output
The 6-phase PWM output mode is used to generate a 6-phase PWM output wave, by using the timer AB1 (TAB1)
and the TMQ option (TMQOPA) in combination.
The 6-phase PWM output mode is enabled by setting the TAB1CTL1.TAB1MD2 to TAB1CTL1.TAB1MD0 bits of
TAB1 to “111”.
One 16-bit counter and four 16-bit compare registers of TAB1 are used to generate a basic 3-phase wave.
The functions of the compare registers are as follows.
TAA4 can perform a tuning operation with TAB1 to generate a conversion trigger source for the A/D converter.
Remark
A dead-time interval is generated from the basic 3-phase wave generated by using three 10-bit dead-time counters
and one compare register to create a wave with a reverse phase to that of the basic 3-phase wave. Then a 6-
phase PWM output wave (U, U, V, V, W, and W) is generated.
The 16-bit counter for generating the basic 3-phase wave counts up or down. After the operation has been started,
this counter counts up. When its count value matches the cycle set to the TAB1CCR0 register, the counter starts
counting down. When the count value matches 0001H, the counter counts up again. This means that a value two
times higher than the value set to the TAB1CCR0 register + 1 is the carrier cycle.
10-bit dead-time counters 1 to 3, which generate the dead-time interval, count up. Therefore, the value set to the
TAB1 dead-time compare register (TAB1DTC) is used as a dead-time value as is. Because three counters are
used, dead time can be generated independently in phases U, V, and W. However, because there is only one
register that specifies a dead-time value (TAB1DTC), the same dead-time value is used in all three phases.
TAB1CCR0 register
TAB1CCR1 register
TAB1CCR2 register
TAB1CCR3 register
m = Set value of TAB1CCR0 register
i = Set value of TAB1CCR1 register
j = Set value of TAB1CCR2 register
k = Set value of TAB1CCR3 register
Compare Register
Setting of cycle
Specifying output width of phase U
Specifying output width of phase V
Specifying output width of phase W
Function
CHAPTER 11 MOTOR CONTROL FUNCTION
0002H ≤ m ≤ FFFEH
0000H ≤ i ≤ m + 1
0000H ≤ j ≤ m + 1
0000H ≤ k ≤ m + 1
Settable Range
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