LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 194

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Verilog for Precision RTL Synthesis
This section lists syntax and examples for all the sysIO Attributes in Verilog using the Precision RTL Synthesis syn-
thesis tool.
Syntax
Table 8-10. Verilog Precision RTL Synthesis Attribute Syntax
Example
//****IO_TYPE ***
//pragma attribute portA IO_TYPE PCI33
//pragma attribute portB IO_TYPE LVCMOS33
//pragma attribute portC IO_TYPE SSTL25_II
//*** Opendrain ***
//pragma attribute portB OPENDRAIN ON
//pragma attribute portD OPENDRAIN OFF
//*** Drive ***
//pragma attribute portB DRIVE 20
//pragma attribute portD DRIVE 8
//*** Pullmode***
//pragma attribute portB PULLMODE UP
//*** PCIClamp***
//pragma attribute portB PCICLAMP ON
//*** Slewrate ***
//pragma attribute portB SLEWRATE FAST
//pragma attribute portD SLEWRATE SLOW
IO_TYPE
OPENDRAIN
DRIVE
PULLMODE
PCICLAMP
SLEWRATE
FIXEDDELAY
LOC
ATTRIBUTE
//pragma attribute PinName IO_TYPE IO_TYPE Value
//pragma attribute PinName OPENDRAIN OpenDrain Value
//pragma attribute PinName DRIVE Drive Value
//pragma attribute PinName IO_TYPE Pullmode Value
//pragma attribute PinName PCICLAMP PCIClamp Value
//pragma attribute PinName IO_TYPE Slewrate Value
//pragma attribute PinName IO_TYPE Fixeddelay Value
//pragma attribute PinName LOC pin_location
8-20
SYNTAX
LatticeECP/EC and LatticeXP
sysIO Usage Guide