LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 367

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LFEC3E-3QN208I

Manufacturer Part Number
LFEC3E-3QN208I
Description
IC FPGA 3KLUTS 208PQFP
Manufacturer
Lattice
Series
EC3r

Specifications of LFEC3E-3QN208I

Number Of Logic Elements/cells
3100
Number Of Labs/clbs
-
Total Ram Bits
56320
Number Of I /o
145
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q6377645

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFEC3E-3QN208I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LatticeECP-DSP sysDSP Usage Guide
MULTADDSUBSUM Module
The MULTADDSUBSUM GUI configures Multiplier Addition/Subtraction Addition elements to be packed into the
primitives MULT18X18ADDSUBSUM or MULT9X9ADDSUBSUM. The Basic mode, shown in Figure 15-8, consists
of one clock (optional), one clock enable and one reset tied to all registers. Using the MULTADDSUBSUM you can
span multiple sysDSP Blocks. The SRI and SRO ports can only be enabled if inputs are less than 18 bits. The
Advanced mode, shown in Figure 15-9, provides finer control over the registers. In the Advanced mode you can
control each register with independent clocks, clock enables and resets.
Figure 15-8. MULTADDSUBSUM Mode Basic Set-up
15-6

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