LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 242

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Figure 9-49. FIFO_DC With Output Registers, End of Data Read Cycle
Finally, if you select the option enable output register with RdEn, it still delays the data out by one clock cycle (as
compared to the non-pipelined FIFO_DC), and the RdEn should be high also during that clock cycle. Otherwise the
data takes an extra clock cycle when the RdEn is goes true.
Figure 9-50. FIFO_DC With Output Registers and RdEn on Output Registers
RPReset
RPReset
WrClock
RdClock
WrClock
RdClock
Almost
Almost
Almost
Almost
Empty
Empty
Empty
Empty
Reset
Reset
WrEn
RdEn
WrEn
RdEn
Data
Data
Full
Full
Full
Full
Q
Q
Data_N-4
Data_N-3
Invalid Q
Data_N-2
9-43
Invalid Data
Invalid Data
Data_1
Data_1
LatticeECP/EC and LatticeXP Devices
Data_N
Data_2
Data_3
Memory Usage Guide