LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 470

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Including the SPI Interface in the FPGA Design
If the user wishes JTAG to have access to the SPI Serial Flash while the FPGA is operating, for instance to allow
background configuration updates, then the Soft SPI Interface must be instantiated into the user code. Once a con-
figuration bitstream containing the user code and the Soft SPI Interface has been created the programming
sequences will be identical to those detailed above (see step 5).
Sample Code
The following code samples are simple VHDL and Verilog files that show how to instantiate the netlist file, i.e. the
Soft SPI Interface. The netlist file should be placed in the same directory as the top design file. In the following
examples the netlist file is called SPITOP.ngo. The netlist file, along with these sample source files, is freely avail-
able from the Lattice Semiconductor web site at www.latticesemi.com.
8. Click on OK.
9. From the main project window click the green GO button on the toolbar; this will begin the download pro-
10. Upon successful download, in order to configure the FPGA with the new configuration, the user must
cess.
cycle power to the FPGA or pulse the FPGA's Program pin low then high.
21-14
SPI Serial Flash Programming Using ispJTAG
on LatticeECP/EC FPGAs