LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 249
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LFEC3E-3QN208I
Manufacturer Part Number
LFEC3E-3QN208I
Description
IC FPGA 3KLUTS 208PQFP
Manufacturer
Lattice
Series
EC3r
Datasheets
1.LFEC3E-5TN144C.pdf
(163 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFEC3E-3QN208I.pdf
(478 pages)
Specifications of LFEC3E-3QN208I
Number Of Logic Elements/cells
3100
Number Of Labs/clbs
-
Total Ram Bits
56320
Number Of I /o
145
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
208-BFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q6377645
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-3QN208I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
Figure 9-60. PFU-based Distributed ROM (Sync_ROM) for LatticeECP/EC and LatticeXP Devices
Ports such as Out Clock (OutClock) and Out Clock Enable (OutClockEn) are not available in the hardware primi-
tive. These are generated by IPexpress when the user wants the to enable the output registers in the IPexpress
configuration.
The various ports and their definitions for the memory are included in Table 9-16. The table lists the corresponding
ports for the module generated by IPexpress and for the primitive.
Table 9-16. PFU-based Distributed ROM Port Definitions
Users have the option of enabling the output registers for Distributed ROM (Distributed_ROM). Figures 8-43 and 8-
44 show the internal timing waveforms for the Distributed ROM with these options.
Figure 9-61. PFU Based ROM Timing Waveform – without Output Registers
Address
OutClock
OutClockEn
Reset
Q
Port Name in Generated
Module
Address
Q
AD[3:0]
—
—
—
DO
Invalid Data
Port Name in the EBR
t
SUADDR_PFU
Block Primitive
AD[3:0]
Add_0
t
HADDR_PFU
t
CORAM_PFU
9-50
PFU
Address
Out Clock
Out Clock Enable
Reset
Data Out
Data_0
Add_1
Description
LatticeECP/EC and LatticeXP Devices
DO
Data_1
Add_2
—
Rising Clock Edge
Active High
Active High
—
Memory Usage Guide
Active State
Data_2
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