LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 4

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Ordering Information
Supplemental Information
LatticeECP/EC Family Data Sheet Revision History
Section II. LatticeECP/EC Family Technical Notes
LatticeECP/EC and LatticeXP sysIO Usage Guide
Part Number Description.................................................................................................................................... 5-1
Ordering Information .......................................................................................................................................... 5-1
For Further Information ...................................................................................................................................... 6-1
LatticeECP/EC Family Data Sheet Revision History.......................................................................................... 7-1
Introduction ........................................................................................................................................................ 8-1
sysIO Buffer Overview ....................................................................................................................................... 8-1
Supported sysIO Standards ............................................................................................................................... 8-1
sysIO Banking Scheme...................................................................................................................................... 8-2
sysIO Standards Supported in Each Bank......................................................................................................... 8-5
LVCMOS Buffer Configurations ......................................................................................................................... 8-5
Differential SSTL and HSTL Support ................................................................................................................. 8-7
PCI Support with Programmable PCICLAMP .................................................................................................... 8-7
5V Interface with PCI Clamp Diode.................................................................................................................... 8-8
Programmable Input Delay ................................................................................................................................ 8-9
Software sysIO Attributes................................................................................................................................... 8-9
Design Considerations and Usage................................................................................................................... 8-12
Differential I/O Implementation......................................................................................................................... 8-13
Technical Support Assistance.......................................................................................................................... 8-13
For Further Information ........................................................................................................................... 4-80
Conventional Packaging ........................................................................................................................... 5-2
Lead-Free Packaging................................................................................................................................ 5-8
V
V
V
Input Reference Voltage (V
V
Mixed Voltage Support in a Bank.............................................................................................................. 8-4
Programmable Pull-up/Pull-Down/Buskeeper........................................................................................... 8-5
Programmable Drive ................................................................................................................................. 8-5
Programmable Slew Rate ......................................................................................................................... 8-7
Open Drain Control ................................................................................................................................... 8-7
IO_TYPE ................................................................................................................................................... 8-9
OPENDRAIN........................................................................................................................................... 8-10
DRIVE ..................................................................................................................................................... 8-10
PULLMODE ............................................................................................................................................ 8-11
PCICLAMP.............................................................................................................................................. 8-11
SLEWRATE ............................................................................................................................................ 8-11
FIXEDDELAY.......................................................................................................................................... 8-11
DIN/DOUT............................................................................................................................................... 8-11
LOC......................................................................................................................................................... 8-12
Banking Rules ......................................................................................................................................... 8-12
Differential I/O Rules ............................................................................................................................... 8-12
Assigning V
LVDS....................................................................................................................................................... 8-13
BLVDS .................................................................................................................................................... 8-13
RSDS ...................................................................................................................................................... 8-13
LVPECL .................................................................................................................................................. 8-13
Differential SSTL and HSTL.................................................................................................................... 8-13
CCIO
CCAUX
CCJ
REF1
(1.2V/1.5V/1.8V/2.5V/3.3V).............................................................................................................. 8-3
(1.2V/1.5V/1.8V/2.5V/3.3V) ............................................................................................................ 8-3
for DDR Memory Interface ............................................................................................................. 8-3
(3.3V) ........................................................................................................................................... 8-3
REF
/ V
REF
Groups for Referenced Inputs............................................................................. 8-12
REF1,
V
REF2
)................................................................................................... 8-3
3
LatticeECP/EC Family Data Sheet
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