LFEC3E-3QN208I Lattice, LFEC3E-3QN208I Datasheet - Page 231

• Manufacturer Part Number: LFEC3E-3QN208I
• Description: IC FPGA 3KLUTS 208PQFP
• Manufacturer: Lattice
• Series: EC3r

Specifications of LFEC3E-3QN208I

• Number Of Logic Elements/cells: 3100
• Number Of Labs/clbs: -
• Total Ram Bits: 56320
• Number Of I /o: 145
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 208-BFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q6377645

Lattice Semiconductor
Figure 9-34. FIFO Without Output Registers, End of Data Write Cycle
In this case, as seen above, the Almost Full flag is IN location 2 before the FIFO is filled. The Almost Full flag is
asserted when N-2 location is written, and Full flag is asserted when the last word is written into the FIFO.
Data_X data inputs do not get written as the FIFO is full (Full flag is high).
Now let us look at the waveforms when the contents of the FIFO are read out. Figure 9-35 shows the start of the
read cycle. RdEn goes high and the data read starts. The Full and Almost Full flags gets de-asserted as shown.
Almost Full
Almost
Reset
Empty
Empty
Clock
WrEn
RdEn
Data
Full
Q
Data_N-2
Data_N-1
9-32
Invalid Q
Data_N
LatticeECP/EC and LatticeXP Devices
Data_X
Data_X
Memory Usage Guide