MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 155

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.5.5 Timer Channel Hold Register (TMRx_HOLD)
Addresses: TMRA0_HOLD – F000h base + 4h offset = F004h
6.5.6 Timer Channel Counter Register (TMRx_CNTR)
Addresses: TMRA0_CNTR – F000h base + 5h offset = F005h
Freescale Semiconductor
Reset
Reset
Read
Read
Write
Write
Bit
Bit
HOLD
15–0
Field
15
15
0
0
TMRA1_HOLD – F010h base + 4h offset = F014h
TMRA2_HOLD – F020h base + 4h offset = F024h
TMRA3_HOLD – F030h base + 4h offset = F034h
TMRB0_HOLD – F040h base + 4h offset = F044h
TMRB1_HOLD – F050h base + 4h offset = F054h
TMRB2_HOLD – F060h base + 4h offset = F064h
TMRB3_HOLD – F070h base + 4h offset = F074h
TMRA1_CNTR – F010h base + 5h offset = F015h
TMRA2_CNTR – F020h base + 5h offset = F025h
TMRA3_CNTR – F030h base + 5h offset = F035h
TMRB0_CNTR – F040h base + 5h offset = F045h
TMRB1_CNTR – F050h base + 5h offset = F055h
TMRB2_CNTR – F060h base + 5h offset = F065h
TMRB3_CNTR – F070h base + 5h offset = F075h
14
14
0
0
This read/write register stores the counter's values of specific channels whenever any of the four counters
within a module is read.
13
13
0
0
12
12
0
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
11
0
0
TMRx_HOLD field descriptions
10
10
0
0
0
0
9
9
Preliminary
COUNTER
0
0
8
8
HOLD
Description
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
Chapter 6 Quad Timer (TMR)
0
0
3
3
0
0
2
2
0
0
1
1
0
0
0
0
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