MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 477

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC56F8257MLH
Manufacturer:
MOTOLOLA
Quantity:
560
Part Number:
MC56F8257MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
In initialization mode, the MSCAN is stopped. However, interface registers remain
accessible. This mode is used to reset the CAN_CTL0, CAN_RFLG, CAN_RIER,
CAN_TFLG, CAN_TIER, CAN_TARQ, CAN_TAAK, and CAN_TBSEL registers to
their default values. In addition, the MSCAN enables the configuration of the
CAN_BTR0, CAN_BTR1 bit timing registers; CAN_IDAC; and the CAN_IDAR,
CAN_IDMR message filters.
Due to independent clock domains within the MSCAN, INITRQ must be synchronized to
all domains by using a special handshake mechanism. This handshake causes additional
synchronization delay.
If there is no message transfer ongoing on the CAN bus, the minimum delay will be two
additional bus clocks and three additional CAN clocks. When all parts of the MSCAN are
in initialization mode, the INITAK flag is set. The application software must use INITAK
as a handshake indication for the request (INITRQ) to go into initialization mode.
>
13.4.5.6 MSCAN Power Down Mode
The MSCAN is in power down mode when
Freescale Semiconductor
• CPU is in stop mode
CAN_CTL0 register. Otherwise, the abort of an on-going
message can cause an error condition and can impact other
CAN bus devices.
The CPU cannot clear INITRQ before initialization mode
(INITRQ = 1 and INITAK = 1) is active.
Bus Clock Domain
CPU
Init Request
Figure 13-88. Initialization Request/Acknowledge Cycle
INITAK
Flag
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
INITRQ
sync.
INITAK
Chapter 13 Freescale's Scalable Controller Area Network (MSCAN)
Preliminary
Note
SYNC
SYNC
CAN Clock Domain
sync.
INITRQ
INITAK
INIT
Flag
477

Related parts for MC56F8257MLH