MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 371

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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If start bit verification is not successful, the RT clock is reset and a new search for a start
bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at
RT8, RT9, and RT10. The following table summarizes the results of the data bit samples.
To verify a stop bit and to detect noise, recovery logic takes samples at RT8, RT9, and
RT10. The following table summarizes the results of the stop bit samples.
Freescale Semiconductor
RT8, RT9, and RT10 Samples
RT3, RT5, and RT7 Samples
000
001
010
011
100
101
110
111
000
001
010
011
100
101
110
111
The RT8, RT9, and RT10 samples do not affect start bit
verification. If any or all of the RT8, RT9, and RT10 start bit
samples are logic ones following a successful start bit
verification, the noise flag (STAT[NF]) is set and the receiver
assumes that the bit is a start bit (logic zero).
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Table 11-24. Start Bit Verification
Table 11-25. Data Bit Recovery
Data Bit Determination
Start Bit Verification
Preliminary
Note
Yes
Yes
Yes
Yes
No
No
No
No
Chapter 11 Queued Serial Communications Interface (QSCI)
0
0
0
1
0
1
1
1
Noise Flag
Noise Flag
0
1
1
0
1
0
0
0
0
1
1
1
1
1
1
0
371

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