MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 378

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Functional Description
CTRL1[WAKE] determines how the SCI is brought out of the standby state to process an
incoming message. CTRL1[WAKE] enables either idle line wakeup or address mark
wakeup:
11.4.4.9 Single-Wire Operation
Normally, the SCI uses two pins for transmitting and receiving. In single-wire operation,
the RXD pin is disconnected from the SCI and is available as a general-purpose I/O pin.
The SCI uses the TXD pin for both receiving and transmitting.
378
• Idle input line wakeup (CTRL1[WAKE] = 0): In this wakeup method, an idle
• Address mark wakeup (CTRL1[WAKE] = 1): In this wakeup method, a logic one in
condition on the RXD pin clears CTRL1[RWU] and wakes the SCI. The initial frame
(or frames) of every message contains addressing information. All receivers evaluate
the addressing information, and receivers for which the message is addressed process
the frames that follow. Any receiver for which a message is not addressed can set its
CTRL1[RWU] bit and return to the standby state. CTRL1[RWU] remains set and the
receiver remains on standby until another preamble appears on the RXD pin.
The idle line wakeup method requires that messages be separated by at least one
preamble and that no message contains preambles.
The preamble that wakes a receiver does not set the receiver idle bit, STAT[RIDLE],
or the receive data register full flag, STAT[RDRF].
the most significant bit (MSB) position of a frame clears CTRL1[RWU] and wakes
up the SCI. The logic one in the MSB position marks a frame as an address frame
that contains addressing information. All receivers evaluate the addressing
information, and the receivers for which the message is addressed process the frames
that follow. Any receiver for which a message is not addressed can set its RWU bit
and return to the standby state. CTRL1[RWU] remains set and the receiver remains
on standby until another address frame appears on the RXD pin.
The logic one MSB of an address frame clears the receiver's CTRL1[RWU] bit
before the stop bit is received and sets STAT[RDRF].
The address mark wakeup method allows messages to contain preambles but requires
that the MSB be reserved for use in address frames.
With CTRL1[WAKE] clear, setting CTRL1[RWU] after the
RXD pin is idle can cause the receiver to wake up immediately.
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Note
Freescale Semiconductor

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