MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 176

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
Example: 6.6.2.11.1 Generate Periodic Interrupt Cascading Two Counters
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//
// This example generates an interrupt every 30 seconds,
//
//
// To do this, counter 2 is used to count 60,000 IP_bus clocks, which means it
//
// Counter 3 is cascaded and used to count the 0.001 second ticks and
//
//
void TimerInt_Init(void)
{
// Set counter 2 to count IP_bus clocks
// Set counter 3 as cascaded and to count counter 2 outputs
}
/* TMRA3_CTRL: CM=7,PCS=6,SCS=0,ONCE=0,LENGTH=1,DIR=0,Co_INIT=0,OM=0 */
setReg(TMRA3_CTRL,0xEC20);
/* TMRA3_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0,
setReg(TMRA3_SCTRL,0x00);
/* TMRA2_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0,
setReg(TMRA2_SCTRL,0x00);
setReg(TMRA3_CNTR,0x00);
setReg(TMRA2_CNTR,0x00);
setReg(TMRA3_LOAD,0x00);
setReg(TMRA2_LOAD,0x00);
setReg(TMRA3_COMP1, 30000);
setReg(TMRA3_CMPLD1,30000);
setReg(TMRA2_COMP1, 60000);
setReg(TMRA2_CMPLD1,60000);
/* TMRA3_CSCTRL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,
setReg(TMRA3_CSCTRL,0x41);
/* TMRA2_CSCTRL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,
setReg(TMRA2_CSCTRL,0x01);
setRegBitGroup(TMRA2_CTRL,CM,0x01);
/* TMRA2_CTRL: CM=0,PCS=8,SCS=0,ONCE=0,LENGTH=1,DIR=0,Co_INIT=0,OM=0 */
setReg(TMRA2_CTRL,0x1020);
(See Processor Expert TimerInt bean.)
assuming the chip is operating at 60 MHz.
will compare and reload every 0.001 seconds.
generate the desired interrupt interval.
It is possible to connect counters together by using the other
(non-cascade) counter modes and selecting the outputs of other
counters as a clock source. In this case, the counters are
operating in a ripple mode, where higher order counters will
transition a clock later than a purely synchronous design.
Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */
Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */
TCF2EN=0,TCF1EN=1,TCF2=0,TCF1=0,CL2=0,CL1=1 */
TCF2EN=0,TCF1EN=0,TCF2=0,TCF1=0,CL2=0,CL1=1 */
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
/* Reset counter register */
/* Reset load register */
// Set to cycle every milisecond
/* Enable compare 1 interrupt and */
/* compare 1 preload
/* Enable Compare 1 preload */
/* Run counter */
/* Stop all functions of the timer */
/* Set up cascade counter mode */
/* milliseconds in 30 seconds */
Preliminary
Note
*/
Freescale Semiconductor