MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 228

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
7.3.27 PWM SM3 Control Register (PWM_SM3CTRL)
Address: PWM_SM3CTRL – F300h base + 93h offset = F393h
228
Reset
Read
Write
Bit
15–12
LDFQ
HALF
FULL
Field
9–8
DT
11
10
15
0
14
0
LDFQ
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Half Cycle Reload
This read/write bit enables half-cycle reloads. A half cycle is defined by when the submodule counter
matches the VAL0 register and does not have to be half way through the PWM cycle.
0
1
Full Cycle Reload
This read/write bit enables full-cycle reloads. A full cycle is defined by when the submodule counter
matches the VAL1 register. Either CTRL[HALF] or CTRL[FULL] must be set in order to move the buffered
data into the registers used by the PWM generators. If both CTRL[HALF] and CTRL[FULL] are set, then
reloads can occur twice per cycle.
0
1
Deadtime
Half-cycle reloads disabled.
Half-cycle reloads enabled.
Full-cycle reloads disabled.
Full-cycle reloads enabled.
13
0
Every PWM Opportunity
Every 2 PWM Opportunities
Every 3 PWM Opportunities
Every 4 PWM Opportunities
Every 5 PWM Opportunities
Every 6 PWM Opportunities
Every 7 PWM Opportunities
Every 8 PWM Opportunities
Every 9 PWM Opportunities
Every 10 PWM Opportunities
Every 11 PWM Opportunities
Every 12 PWM Opportunities
Every 13 PWM Opportunities
Every 14 PWM Opportunities
Every 15 PWM Opportunities
Every 16 PWM Opportunities
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
HALF FULL
PWM_SM3CTRL field descriptions
11
0
Table continues on the next page...
10
1
0
9
Preliminary
DT
0
8
Description
0
0
7
0
6
PRSC
0
5
0
4
0
0
3
Freescale Semiconductor
0
2
0
0
1
0
0