MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 218

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Memory Map and Registers
218
PWMA_IN
PWMB_IN
PWMX_IN
PWMAFS
PWMBFS
Reserved
Reserved
12–11
POLA
POLB
POLX
Field
7–6
5–4
3–2
15
14
13
10
9
8
PWMA Input
This read only bit shows the logic value currently being driven into the PWMA input.
PWMB Input
This read only bit shows the logic value currently being driven into the PWMB input.
PWMX Input
This read only bit shows the logic value currently being driven into the PWMX input.
This read-only bitfield is reserved and always has the value zero.
PWMA Output Polarity
This bit inverts the PWMA output polarity.
0
1
PWMB Output Polarity
This bit inverts the PWMB output polarity.
0
1
PWMX Output Polarity
This bit inverts the PWMX output polarity.
0
1
This read-only bitfield is reserved and always has the value zero.
PWMA Fault State
These bits determine the fault state for the PWMA output during fault conditions and STOP mode. It may
also define the output state during WAIT and DEBUG modes depending on the settings of
CTRL2[WAITEN] and CTRL2[DBGEN].
00
01
10
11
PWMB Fault State
These bits determine the fault state for the PWMB output during fault conditions and STOP mode. It may
also define the output state during WAIT and DEBUG modes depending on the settings of
CTRL2[WAITEN] and CTRL2[DBGEN].
00
01
10
11
PWMA output not inverted. A high level on the PWMA pin represents the "on" or "active" state.
PWMA output inverted. A low level on the PWMA pin represents the "on" or "active" state.
PWMB output not inverted. A high level on the PWMB pin represents the "on" or "active" state.
PWMB output inverted. A low level on the PWMB pin represents the "on" or "active" state.
PWMX output not inverted. A high level on the PWMX pin represents the "on" or "active" state.
PWMX output inverted. A low level on the PWMX pin represents the "on" or "active" state.
Output is forced to logic 0 state prior to consideration of output polarity control.
Output is forced to logic 1 state prior to consideration of output polarity control.
Output is tristated.
Output is tristated.
Output is forced to logic 0 state prior to consideration of output polarity control.
Output is forced to logic 1 state prior to consideration of output polarity control.
Output is tristated.
Output is tristated.
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
PWM_SMnOCTRL field descriptions
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Preliminary
Description
Freescale Semiconductor