MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 617

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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20.3.8 Calculate Data and IFR Block Signature Commands
The RDARYM command calculates data in the flash array into a checksum (signature).
The RDARYMI command performs a similar function for the factory configuration data
stored in the device.
The data calculation uses an MISR algorithm with the following polynomial:
p(x) = x + x
The command RDARYM uses the data and address within CPU program memory write
instructions to specify the start address and data length.
If the length passed as an argument to calculate data signature command RDARYM is
greater than the array size, addresses keep wrapping around the block limits until the
length count is reached.
If the length passed as argument to calculate data signature command RDARYM is zero,
the algorithm runs the maximum number of cycles that can be generated by the length
counter. It happens regardless of the array maximum address, and it continues wrapping
around the address limits.
The command RDARYMI has the start address and length set by default.
20.3.9 Effects of Wait and Stop Mode
If a command is active (CCIF=0) when the device enters wait or stop mode, the
command is aborted and the data being programmed or erased is lost. A pending
command (CBEIF=0) is not executed after the device exits wait or stop mode. The CCIF
and ACCERR flags are set if a command is active when the device enters wait or stop
mode.
When entering wait or stop mode, the flash module immediately (within the next clock
period) sets the ACCERR flag, regardless of the operation being executed.
Freescale Semiconductor
2
Because active commands are immediately aborted when the
device enters wait mode, it is strongly recommended that user
software does not execute the WAIT instruction during
program and erase execution.
+ x
4
+ x
15
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Note
Chapter 20 Flash Memory (HFM)
617

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