MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 476

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Modes of Operation
If the WUPE bit in CAN_CTL0 is not asserted, the MSCAN will mask any activity it
detects on CAN. The RXCAN pin is therefore held internally in a recessive state. This
locks the MSCAN in sleep mode. WUPE must be set before entering sleep mode to take
effect.
The MSCAN is able to leave sleep mode (wake) only when:
After wakeup, the MSCAN waits for 11 consecutive recessive bits to synchronize to the
CAN bus. As a consequence, if the MSCAN is awakened by a CAN frame, this frame is
not received.
The receive message buffers (RxFG and RxBG) contain messages if they were received
before sleep mode was entered. All pending actions will be executed upon wakeup;
copying of RxBG into RxFG, message aborts and message transmissions. If the MSCAN
remains in bus-off state after sleep mode was exited, it continues counting the 128
occurrences of 11 consecutive recessive bits.
>
13.4.5.5 MSCAN Initialization Mode
In initialization mode, any on-going transmission or reception is immediately aborted and
synchronization to the CAN bus is lost, potentially causing CAN protocol violations. To
protect the CAN bus system from fatal consequences of violations, the MSCAN
immediately drives the TXCAN pin into a recessive state.
476
• CAN bus activity occurs and WUPE = 1
• the CPU clears the SLPRQ bit
or
The CPU cannot clear the SLPRQ bit before sleep mode
(SLPRQ = 1 and SLPAK = 1) is active.
The user is responsible for ensuring that the MSCAN is not
active when initialization mode is entered. The recommended
procedure is to bring the MSCAN into sleep mode (SLPRQ = 1
and SLPAK = 1) before setting the INITRQ bit in the
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Preliminary
Note
Note
Freescale Semiconductor

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