MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 550

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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MC56F8257MLH
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MC56F8257MLH
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Memory Map and Registers
16.2.14 Peripheral Clock Enable Register 2 (SIM_PCE2)
Address: SIM_PCE2 – F0E0h base + Eh offset = F0EEh
550
Reset
Read
Write
Bit
PWMCH0
Reserved
MSCAN
QSPI0
REFC
REFA
REFB
CRC
HFM
15–4
Field
Field
IIC0
IIC1
8
7
6
5
4
3
2
1
0
3
15
0
14
0
QSPI0 IPBus Clock Enable
IIC0 IPBus Clock Enable
IIC1 IPBus Clock Enable
CRC IPBus Clock Enable
REFA IPBus Clock Enable
REFB IPBus Clock Enable
REFC IPBus Clock Enable
HFM IPBus Clock Enable
The PCE bit for HFM is reset to 1 in order to support speical flash functions such as flash lockout recovery
which must operate when coming out of reset. This bit may be subsequently set to 0 to save power by
disabling the HFM peripheral clock during periods in which no programming state machine operations are
in process and the flash is being used for instruction fetch only.
MSCAN IPBus Clock Enable
This read-only bitfield is reserved and always has the value zero.
PWM Channel 0 IPBus Clock Enable
13
0
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
SIM_PCE1 field descriptions (continued)
11
0
SIM_PCE2 field descriptions
Table continues on the next page...
10
0
0
0
9
Preliminary
0
8
Description
Description
0
7
0
6
0
5
0
4
0
3
Freescale Semiconductor
0
2
0
1
0
0

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