MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 222

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Memory Map and Registers
7.3.21 PWM SMx Fault Disable Mapping Register
This register determines which PWM pins are disabled by the fault protection inputs.
Reset sets all of the bits in the fault disable mapping register.
Addresses: PWM_SM0DISMAP – F300h base + 16h offset = F316h
222
Reset
Read
Write
Bit
Reserved
Reserved
Reserved
Reserved
DISX
DISB
DISA
11–8
Field
7–4
3–0
15
14
13
12
15
1
1
PWM_SM1DISMAP – F300h base + 46h offset = F346h
PWM_SM2DISMAP – F300h base + 76h offset = F376h
(PWM_SMnDISMAP)
14
1
1
This read-only bit is reserved and always has the value one.
This read-only bit is reserved and always has the value one.
This read-only bit is reserved and always has the value one.
This read-only bit is reserved and always has the value one.
PWMX Fault Disable Mask
Each of the four bit of this read/write field is one-to-one associated with the four FAULTx inputs. The
PWMX output will be turned off if there is a logic 1 on a FAULTx input and a 1 in the corresponding bit of
this field. A reset sets all bits in this field.
PWMB Fault Disable Mask
Each of the four bit of this read/write field is one-to-one associated with the four FAULTx inputs. The
PWMB output will be turned off if there is a logic 1 on a FAULTx input and a 1 in the corresponding bit of
this field. A reset sets all bits in this field.
PWMA Fault Disable Mask
Each of the four bit of this read/write field is one-to-one associated with the four FAULTx inputs. The
PWMA output will be turned off if there is a logic 1 on a FAULTx input and a 1 in the corresponding bit of
this field. A reset sets all bits in this field.
13
1
1
12
1
1
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
PWM_SMnDISMAP field descriptions
11
1
10
1
DISX
1
9
Preliminary
1
8
Description
1
7
1
6
DISB
1
5
1
4
1
3
Freescale Semiconductor
1
2
DISA
1
1
1
0

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