MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 274

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
The generation of the Local Sync signal is performed exactly the same way as the other
PWM signals in the submodule. While comparator 0 causes a rising edge of the Local
Sync signal, comparator 1 generates a falling edge. Comparator 1 is also hardwired to the
reload logic to generate the full cycle reload indicator.
If VAL1 is controlling the modulus of the counter and VAL0 is half of the VAL1 register
minus the INIT value, then the half cycle reload pulse will occur exactly half way
through the timer count period and the Local Sync will have a 50% duty cycle. On the
other hand, if the VAL1 and VAL0 registers are not required for register reloading or
counter initialization, they can be used to modulate the duty cycle of the Local Sync
signal, effectively turning it into an auxiliary PWM signal (PWMX) assuming that the
PWMX pin is not being used for another function such as input capture or deadtime
distortion correction. Including the Local Sync signal, each submodule is capable of
generating three PWM signals where software has complete control over each edge of
each of the signals.
274
FORCE_OUT
FRCEN
16 bit counter
VAL1
VAL5
VAL2
VAL3
VAL0
VAL4
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Figure 7-221. PWM Generation Hardware
Force Init
Preliminary
PWM23_INIT
PWMX_INIT
PWM45_INIT
comparator
comparator
comparator
comparator
comparator
comparator
comparator
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
16 bit
D
D
PWM off
D
PWM off
PWM off
PWM on
PWM on
PWM on
Output Triggers
R
R
S
S
R
S
Q
Q
Q
Freescale Semiconductor
to Force Out
PWMX
(inverted
Local Sync)
PWM23
PWM45
Half Comp
Mod Comp
logic