MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 275

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

If the comparators and edge value registers are not required for PWM generation, they
can also be used for other functions such as output compares, generating output triggers,
or generating interrupts at timed intervals.
The 16-bit comparators shown in
"equal to," comparators. In addition, if both the set and reset of the flip-flop are asserted,
then the flop output goes to 0.
7.4.2.5 Output Compare Capabilities
By using the VALx registers in conjunction with the submodule timer and 16 bit
comparators, buffered output compare functionality can be achieved with no additional
hardware required. Specifically, the following output compare functions are possible:
In PWM generation, an output compare is initiated by programming a VALx register for
a timer compare which in turn causes the output of the D flip-flop to either set or reset.
For example, if an output compare is desired on the PWMA signal that sets it high, VAL2
would be programmed with the counter value where the output compare should take
place. However, to prevent the D flip-flop from being reset again after the compare has
occurred, the VAL3 register must be programmed to a value outside of the modulus
range of the counter. Therefore, a compare that would result in resetting the D flip-flop
output would never occur. Conversely, if an output compare is desired on the PWMA
signal that sets it low, the VAL3 register is programmed with the appropriate count value
and the VAL2 register is programmed with a value outside the counter modulus range.
Regardless of whether a high compare or low compare is programmed, an interrupt or
output trigger can be generated when the compare event occurs.
7.4.2.6 Force Out Logic
For each submodule, software can select between seven signal sources for the
FORCE_OUT signal: local CTRL2[FORCE], the Master Force signal from submodule0,
the local Reload signal, the Master Reload signal from submodule0, the Local Sync
signal, the Master Sync signal from submodule0, or the EXT_FORCE signal from on- or
off-chip depending on the chip architecture. The local signals are used when the user
Freescale Semiconductor
• An output compare sets the output high
• An output compare sets the output low
• An output compare generates an interrupt
• An output compare generates an output trigger
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Figure 7-221
Preliminary
Chapter 7 Enhanced Flex Pulse Width Modulator (eFlexPWM)
are "equal to or greater than," not just
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