MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 313

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.2.9 GPIO Interrupt Edge Sensitive Register (GPIOx_IESR)
When an edge is detected by the edge detector circuit and the GPIO Interrupt Enable
register's field is set to one, this register's field records the interrupt. This read/write
register clears the corresponding Interrupt Pending bit by writing one to the appropriate
Interrupt Edge Sensitive bit. Writing zero to an Interrupt Edge Sensitive bit is ignored.
Addresses: GPIOA_IESR – F140h base + 8h offset = F148h
9.2.10 GPIO Push-Pull Mode Register (GPIOx_PPMODE)
This register can be used to explicitly set each output driver to either push-pull or open-
drain mode. If write protection (via the SIM PROT register) is implemented on an
individual device, then this register value cannot be changed after the write protect signal
is asserted.
Freescale Semiconductor
Reset
Read
Write
Bit
15–0
15–0
Field
Field
IES
IP
15
0
GPIOB_IESR – F150h base + 8h offset = F158h
GPIOC_IESR – F160h base + 8h offset = F168h
GPIOD_IESR – F170h base + 8h offset = F178h
GPIOE_IESR – F180h base + 8h offset = F188h
GPIOF_IESR – F190h base + 8h offset = F198h
14
0
Interrupt Pending Bits
0
1
Interrupt Edge-Sensitive Bits
0
1
No Interrupt
Interrupt occurred
No edge detected if read; no effect if writing
An edge detected if read; clear corresponding Interrupt Pending bit if writing
13
0
12
0
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
11
0
GPIOx_IESR field descriptions
GPIOx_IPR field descriptions
10
0
0
9
Preliminary
0
8
IES
Description
Description
0
7
Chapter 9 General-Purpose Input/Output (GPIO)
0
6
0
5
0
4
0
3
0
2
0
1
0
0
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