MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 86

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257MLH

Manufacturer Part Number
MC56F8257MLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257MLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Manufacturer
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MC56F8257MLH
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Functional Description
2.4.2.1 Normal Mode Operation
The ADC has two normal operating modes: single-ended mode and differential mode.
For a given sample, the mode of operation is determined by the CTRL1[CHNCFG] field:
86
• Single-ended mode (CHNCFG bit=0). The input multiplex of the ADC selects one of
• Differential mode (CHNCFG bit=1). The ADC measures the voltage difference
the 8 analog inputs and directs it to the plus terminal of the A/D core. The minus
terminal of the A/D core is connected to the V
the voltage of the selected analog input and compares it against the (V
V
between two analog inputs and compares that value against the (V
voltage range. The input is selected as an input pair: ANA0/1, ANA2/3, ANA4/5,
REFLO
ANA0
ANA7
ANB0
ANB1
) reference voltage range.
Input Select
Input Select
Multiplex
Multiplex
Analog
Analog
Figure 2-70. Top-Level Diagram of Cyclic ADC
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Interface Function/
Interface Function/
Program Gain
Program Gain
Preliminary
Multiplex
Multiplex
REFLO
θ θ
reference. The ADC measures
RSD 1
RSD 1
Cyclic ADC Core
θ 1
Converter A
Cyclic ADC Core
Converter B
θ 1
REFH
Freescale Semiconductor
RSD 2
RSD 2
θ 2 2
θ 2 2
REFH
–V
REFLO
-
)

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