MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 171

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.6.2.6 Quadrature-Count Mode with Index Input
As an extension to the quadrature count mode discussed in the previous paragraph, some
rotary shafts have a HOME or INDEX indicator. This would be a third input to the timer
that is used to reset the timer's counter.
In this example, channel 0 is used to decode the quadrature inputs, but it doesn't actually
count. Because its upper and lower limits are both set to 0, its output is cascaded count up
and count down signals each time the quadrature inputs indicate a change in count.
Channel 1 works in cascaded count mode receiving its counting instructions from channel
0. When an input capture event occurs, channel 1 is programmed to reset its counter
value. The channel 1 counter contains the position value for the shaft.
Example: 6.6.2.6.1 Quadrature Count Mode with Index Input Example
>
6.6.2.7 Signed-Count Mode
If CTRL[CM] is set to '101', the counter counts the primary clock source while the
selected secondary source provides the selected count direction (up/down).
Freescale Semiconductor
//
//
//
// Timer input 0 is used as the primary count source (PHASEA).
// Timer input 1 is used as the secondary count source (PHASEB).
// Timer input 2 is used as the index input source (INDEX).
//
void Pulse_Init(void)
{
/* TMRA1_CTRL: CM=7,PCS=100,SCS=2,ONCE=0,LENGTH=0,DIR=0,Co_INIT=0,OM=0 */
/* TMRA1_SCTRL: Capture_Mode=10 */
/* TMRA1_CSTRL: ROC=1 */
setRegBitGroup(TMRA0_CTRL,CM,0x04);
}
/* TMRA0_CTRL: CM=0,PCS=0,SCS=1,ONCE=0,LENGTH=1,DIR=0,Co_INIT=0,OM=0 */
setReg(TMRA0_CTRL,0xA0);
/* TMRA0_SCTRL: TCF=0,TCFIE=0,TOF=0,TOFIE=0,IEF=0,IEFIE=0,IPS=0,INPUT=0,
setReg(TMRA0_SCTRL,0x00);
setReg(TMRA0_CNTR,0x00);
setReg(TMRA0_LOAD,0x00);
setReg(TMRA0_COMP1,0x00);
setReg(TMRA0_COMP2,0x00);
/* TMRA0_CSCTRL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,
setReg(TMRA0_CSCTRL,0x00);
setReg(TMRA1_CTRL,0xEA00);
setReg(TMRA1_SCTRL,0x0080);
setReg(TMRA1_CTRL,0x0800);
This example uses TMRA0and TMRA1 for counting states of a quadrature position encoder.
(See Processor Expert PulseAccumulator bean.)
Capture_Mode=0,MSTR=0,EEOF=0,VAL=0,FORCE=0,OPS=0,OEN=0 */
TCF2EN=0,TCF1EN=0,TCF2=0,TCF1=0,CL2=0,CL1=0 */
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
/* Set up compare 1 register */
/* Run counter */
/* Reset counter register */
/* Reset load register */
/* Set up mode */
/* Set up compare 2 register */
/* Set up capture edge */
/* Set up reload on capture */
Preliminary
Chapter 6 Quad Timer (TMR)
171