MC56F8257MLH Freescale Semiconductor, MC56F8257MLH Datasheet - Page 348

• Manufacturer Part Number: MC56F8257MLH
• Description: DSC 64K FLASH 60MHZ 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8257MLH

• Core Processor: 56800E
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-LQFP
• Product: DSCs
• Processor Series: 56800E
• Core: 56800E
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 54
• Data Ram Size: 8 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Initialization/Application Information
348
from Data reg
Dummy read
Switch to
Rx mode
Y
byte to Data reg
transmitted?
address cycle
(master Rx)?
RXAK=0?
Write next
Last byte
End of
Y
N
N
Tx
signal (MST=0)
Generate stop
N
Y
Tx/Rx?
Set TXACK
Figure 10-39. Typical I2C Interrupt Routine
MC56F825x/4x Reference Manual, Rev. 2, 10/2010
Y
Rx
Read data from
last byte to be
to be read?
Last byte
and store
Data reg
2nd to
read?
N
N
signal (MST=0)
Generate stop
Y
Y
Preliminary
Clear IICIF
Master
mode?
RTI
Set TX mode
to Data reg
Write data
(read)
N
N
Y
from Data reg
Set Rx mode
Dummy read
Clear ARBL
IIAAS=1?
SRW=1?
Y
N (write)
Address transfer
see note 1
Transmit
next byte
Y
Y
Y
from Data reg
Dummy read
Freescale Semiconductor
Arbitration
ACK from
IIAAS=1?
receiver?
Switch to
Rx mode
Tx/Rx?
lost?
Tx
N
N
N
Data transfer
see note 2
Read data from
and store
Rx
Data reg